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f6944eb3c4
the ctr and xer special registers are call-clobbered and syscall-clobbered. failure to include them in the clobber list may result in wrong code that attempts to use a value which is no longer present in the register after the syscall. this has been reported to manifest newly with gcc 15.
95 lines
3.0 KiB
C
95 lines
3.0 KiB
C
#define __SYSCALL_LL_E(x) (x)
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#define __SYSCALL_LL_O(x) (x)
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static inline long __syscall0(long n)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3");
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "=r"(r3)
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:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
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return r3;
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}
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static inline long __syscall1(long n, long a)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3)
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:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
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return r3;
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}
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static inline long __syscall2(long n, long a, long b)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4)
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:: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
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return r3;
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}
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static inline long __syscall3(long n, long a, long b, long c)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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register long r5 __asm__("r5") = c;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5)
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:: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
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return r3;
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}
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static inline long __syscall4(long n, long a, long b, long c, long d)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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register long r5 __asm__("r5") = c;
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register long r6 __asm__("r6") = d;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6)
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:: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
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return r3;
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}
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static inline long __syscall5(long n, long a, long b, long c, long d, long e)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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register long r5 __asm__("r5") = c;
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register long r6 __asm__("r6") = d;
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register long r7 __asm__("r7") = e;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7)
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:: "memory", "cr0", "r8", "r9", "r10", "r11", "r12", "ctr", "xer");
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return r3;
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}
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static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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register long r5 __asm__("r5") = c;
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register long r6 __asm__("r6") = d;
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register long r7 __asm__("r7") = e;
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register long r8 __asm__("r8") = f;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7), "+r"(r8)
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:: "memory", "cr0", "r9", "r10", "r11", "r12", "ctr", "xer");
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return r3;
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}
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#define SO_RCVTIMEO_OLD 18
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#define SO_SNDTIMEO_OLD 19
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#define VDSO_USEFUL
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#define VDSO_CGT_SYM "__kernel_clock_gettime"
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#define VDSO_CGT_VER "LINUX_2.6.15"
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