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mirror of https://git.openwrt.org/openwrt/openwrt.git/ synced 2025-10-05 23:42:55 +02:00

realtek: add support for Linksys LGS328C

Hardware specification
----------------------

* RTL9301 SoC, 1 MIPS 34KEc core @ 800MHz
* 512MB DRAM
* 2MB NOR Flash
* 128MB NAND Flash
* 24 x 10/100/1000BASE-T ports
* 4 x 10G SFP+ ports
* Power LED, Fault LED
* Reset button on front panel
* UART (115200 8N1) via RJ45

Installation using serial interface
-----------------------------------

1. Press "a" "c" "p" during message "Enter correct key to stop autoboot"
2. Start network "rtk network on"
3. Load image "tftpboot <TFTP IP>:openwrt-realtek-rtl930x_nand-linksys_lgs328c-initramfs-kernel.bin"
4. Boot image "bootm"
5. Switch to first bootpartition "fw_setsys bootpartition 0"
5. Download sysupgrade "scp <IP>:openwrt-realtek-rtl930x_nand-linksys_lgs328c-squashfs-sysupgrade.bin /tmp/."
6. Install sysupgrade "sysupgrade /tmp/openwrt-realtek-rtl930x_nand-linksys_lgs328c-squashfs-sysupgrade.bin"

Installation using OEM webinterface
-----------------------------------

This is not possible because the OpenWrt NAND Flash layout is different
from the vendor layout. To be precise. Vendor uses:

- 64 MB vendor UBI root_data
- 32 MB vendor kernel+root 1 (~19 MB used)
- 32 MB vendor kernel+root 2 (~19 MB used)

OpenWrt uses:

- 64 MB vendor UBI (not touched)
- 10 MB OpenWrt kernel
- 22 MB Openwrt mtd-concat UBI
- 23 MB vendor kernel 2 (space reduced, vendor data unchanged)
- 09 MB OpenWrt mtd-concat UBI

Dual-boot with stock firmware using writable u-boot-env
-------------------------------------------------------

From stock to OpenWrt / primary image 1 (CLI as admin):
   - > boot system image1
   - > reboot

From OpenWrt to stock / boot image 2: (shell as root)
   - # fw_setsys bootpartition 1
   - # reboot

Debrick using serial interface
------------------------------

1. Press "a" "c" "p" during message "Enter correct key to stop autoboot"
2. Load vendor image with "upgrade runtime <TFTP IP>:LGS328xxxxx.imag"
3. switch to primary partition "setsys bootpartition 0"
4. safe config "savesys"

Further documentation
---------------------
See https://openwrt.org/toh/linksys/lgs352c

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20255
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Markus Stockhausen
2025-10-01 02:06:43 -04:00
committed by Robert Marko
parent af7a74bad1
commit 853d73f9d1
4 changed files with 465 additions and 0 deletions

View File

@@ -39,6 +39,9 @@ platform_do_upgrade() {
tplink_sg2xxx_fix_mtdparts
default_do_upgrade "$1"
;;
linksys,lgs328c)
nand_do_upgrade "$1"
;;
*)
default_do_upgrade "$1"
;;

View File

@@ -0,0 +1,268 @@
// SPDX-License-Identifier: (GPL-2.0-or-later or MIT)
/dts-v1/;
#include "rtl930x.dtsi"
#include "rtl93xx_linksys_lgs3xxc_nand_common.dtsi"
/ {
compatible = "linksys,lgs328c", "realtek,rtl9301-soc";
model = "Linksys LGS328C";
};
&i2c_mst1 {
status = "okay";
i2c2: i2c@2 {
reg = <2>;
};
i2c3: i2c@3 {
reg = <3>;
};
i2c4: i2c@4 {
reg = <4>;
};
i2c5: i2c@5 {
reg = <5>;
};
};
&sfp0 {
i2c-bus = <&i2c2>;
};
&sfp1 {
i2c-bus = <&i2c3>;
};
&sfp2 {
i2c-bus = <&i2c4>;
};
&sfp3 {
i2c-bus = <&i2c5>;
};
&mdio_aux {
status = "okay";
gpio1: expander@0 {
compatible = "realtek,rtl8231";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&gpio1 0 0 37>;
led-controller {
compatible = "realtek,rtl8231-leds";
status = "disabled";
};
};
};
&mdio_bus0 {
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 3>;
};
phy4: ethernet-phy@4 {
reg = <4>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 4>;
};
phy5: ethernet-phy@5 {
reg = <5>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 5>;
};
phy6: ethernet-phy@6 {
reg = <6>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 6>;
};
phy7: ethernet-phy@7 {
reg = <7>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <0 7>;
};
phy8: ethernet-phy@8 {
reg = <8>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <1 8>;
};
phy9: ethernet-phy@9 {
reg = <9>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <1 9>;
};
phy10: ethernet-phy@10 {
reg = <10>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <1 10>;
};
phy11: ethernet-phy@11 {
reg = <11>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <1 11>;
};
phy12: ethernet-phy@12 {
reg = <12>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <1 12>;
};
phy13: ethernet-phy@13 {
reg = <13>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <1 13>;
};
phy14: ethernet-phy@14 {
reg = <14>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <1 14>;
};
phy15: ethernet-phy@15 {
reg = <15>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <1 15>;
};
phy16: ethernet-phy@16 {
reg = <16>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <2 16>;
};
phy17: ethernet-phy@17 {
reg = <17>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <2 17>;
};
phy18: ethernet-phy@18 {
reg = <18>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <2 18>;
};
phy19: ethernet-phy@19 {
reg = <19>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <2 19>;
};
phy20: ethernet-phy@20 {
reg = <20>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <2 20>;
};
phy21: ethernet-phy@21 {
reg = <21>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <2 21>;
};
phy22: ethernet-phy@22 {
reg = <22>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <2 22>;
};
phy23: ethernet-phy@23 {
reg = <23>;
compatible = "ethernet-phy-ieee802.3-c22";
rtl9300,smi-address = <2 23>;
};
INTERNAL_PHY(24)
INTERNAL_PHY(25)
INTERNAL_PHY(26)
INTERNAL_PHY(27)
};
&switch0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
SWITCH_PORT_SDS(0, 1, 0, qsgmii)
SWITCH_PORT_SDS(1, 2, 0, qsgmii)
SWITCH_PORT_SDS(2, 3, 0, qsgmii)
SWITCH_PORT_SDS(3, 4, 0, qsgmii)
SWITCH_PORT_SDS(4, 5, 1, qsgmii)
SWITCH_PORT_SDS(5, 6, 1, qsgmii)
SWITCH_PORT_SDS(6, 7, 1, qsgmii)
SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT_SDS(8, 9, 2, usxgmii)
SWITCH_PORT_SDS(9, 10, 2, usxgmii)
SWITCH_PORT_SDS(10, 11, 2, usxgmii)
SWITCH_PORT_SDS(11, 12, 2, usxgmii)
SWITCH_PORT_SDS(12, 13, 2, usxgmii)
SWITCH_PORT_SDS(13, 14, 2, usxgmii)
SWITCH_PORT_SDS(14, 15, 2, usxgmii)
SWITCH_PORT_SDS(15, 16, 2, usxgmii)
SWITCH_PORT_SDS(16, 17, 3, usxgmii)
SWITCH_PORT_SDS(17, 18, 3, usxgmii)
SWITCH_PORT_SDS(18, 19, 3, usxgmii)
SWITCH_PORT_SDS(19, 20, 3, usxgmii)
SWITCH_PORT_SDS(21, 22, 3, usxgmii)
SWITCH_PORT_SDS(22, 23, 3, usxgmii)
SWITCH_PORT_SDS(23, 24, 3, usxgmii)
port@24 {
reg = <24>;
label = "lan25";
pcs-handle = <&serdes4>;
phy-handle = <&phy24>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp0>;
};
port@25 {
reg = <25>;
label = "lan26";
pcs-handle = <&serdes6>;
phy-handle = <&phy25>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp1>;
};
port@26 {
reg = <26>;
label = "lan27";
pcs-handle = <&serdes8>;
phy-handle = <&phy26>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp2>;
};
port@27 {
reg = <27>;
label = "lan28";
pcs-handle = <&serdes9>;
phy-handle = <&phy27>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp3>;
};
port@28 {
reg = <28>;
ethernet = <&ethernet0>;
phy-mode = "internal";
fixed-link {
speed = <10000>;
full-duplex;
};
};
};
};

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@@ -0,0 +1,168 @@
// SPDX-License-Identifier: (GPL-2.0-or-later or MIT)
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
aliases {
led-boot = &led_power;
led-failsafe = &led_fault;
led-running = &led_power;
led-upgrade = &led_power;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <100>;
reset {
label = "reset";
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinmux_disable_sys_led>;
led_power: led-0 {
label = "green:power";
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_POWER;
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
};
led_fault: led-1 {
label = "amber:fault";
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_FAULT;
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
};
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x10000000>, /* 256 MiB lowmem */
<0x90000000 0x10000000>; /* 256 MiB highmem */
};
sfp0: sfp-p49 {
compatible = "sff,sfp";
los-gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 12 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
};
sfp1: sfp-p50 {
compatible = "sff,sfp";
los-gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
sfp2: sfp-p51 {
compatible = "sff,sfp";
los-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
};
sfp3: sfp-p52 {
compatible = "sff,sfp";
los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 28 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
};
ubi-concat {
compatible = "mtd-concat";
devices = <&ubiconcat0 &ubiconcat1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "ubi";
reg = <0x0 0x1d00000>;
};
};
};
};
&ecc0 {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0xe0000>;
read-only;
};
partition@e0000 {
label = "u-boot-env";
reg = <0xe0000 0x10000>;
};
partition@f0000 {
label = "u-boot-env2";
reg = <0xf0000 0x10000>;
};
};
};
};
&snand {
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
nand-ecc-engine = <&ecc0>;
nand-ecc-strength = <6>;
nand-ecc-step-size = <512>;
nand-ecc-algo = "bch";
nand-ecc-placement = "oob";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "vendor_ubi";
reg = <0x0 0x4000000>;
read-only;
};
partition@4000000 {
label = "kernel";
reg = <0x4000000 0xa00000>;
};
ubiconcat0: partition@4a00000 {
label = "ubiconcat0";
reg = <0x4a00000 0x1400000>;
};
partition@5e00000 {
label = "runtime2";
reg = <0x5e00000 0x1500000>;
read-only;
};
ubiconcat1: partition@7300000 {
label = "ubiconcat1";
reg = <0x7300000 0x900000>;
};
};
};
};

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@@ -1 +1,27 @@
# SPDX-License-Identifier: GPL-2.0-only
include ./common.mk
define Device/linksys_lgs328c
$(Device/uimage-rt-loader)
SOC := rtl9301
IMAGE_SIZE := 29696k
KERNEL_SIZE := 10240k
DEVICE_VENDOR := Linksys
DEVICE_MODEL := LGS328C
BELKIN_MODEL := BKS-RTL93xx
BELKIN_HEADER := 0x07600001
LINKSYS_MODEL := 60412040
PAGESIZE := 2048
BLOCKSIZE := 128k
UBINIZE_OPTS := -E 5
KERNEL := \
$$(KERNEL) | \
pad-to $$(BLOCKSIZE)
IMAGE/sysupgrade.bin := \
append-rootfs | \
pad-rootfs | \
sysupgrade-tar rootfs=$$$$@ | \
append-metadata
endef
TARGET_DEVICES += linksys_lgs328c